The barrier the metal cannot choose

One level, and the field that bends the bands joined two pieces of one crystal, doped differently, and found everything a diode does in a single requirement: the Fermi level, which is the electrochemical potential of the electrons, must be flat across the junction once equilibrium is reached. The difference in Fermi levels before contact became a built-in voltage, the bands bent to accommodate it, and the bending was the barrier. That essay closed by listing the metal–semiconductor contact among the next arguments: a junction that rectifies for a related reason and switches faster because it stores no minority carriers.

The same requirement applies to a metal on a semiconductor, and it produces a barrier with a height that ought to be easy to predict. For most of the twentieth century’s most important semiconductors, the prediction is wrong — not by a small correction but in its whole dependence on the metal. The barrier hardly depends on which metal is used. The reason is that the interface is not simply the place where one material stops and the other starts. It carries its own electronic states, and a small number of them is enough to take control of the barrier away from the metal.

The rule that should have worked #

A metal’s work function $\phi_m$ is the energy needed to take an electron from its Fermi level to rest just outside the surface. A semiconductor’s electron affinity $\chi$ is the energy gained by bringing an electron from rest outside into the bottom of its conduction band. Put the two in contact, let electrons flow until the Fermi levels line up, and — if nothing else happens at the interface — an electron in the metal at the Fermi level must climb $\phi_m - \chi$ to enter the semiconductor’s conduction band. That is the Schottky–Mott rule, proposed independently by both men in 1938-39. It predicts that the barrier height rises one for one with the metal’s work function.

The dashed line in the figure is that rule for n-type silicon, whose electron affinity is 4.05 electronvolts. Aluminium, with a work function of 4.28 eV, should make a barrier of only 0.23 eV, nearly an ohmic contact. Platinum, at 5.65 eV, should make a barrier of 1.60 eV, more than the band gap. The tick marks along the top of the plot place seven common contact metals on the work-function axis, and by the rule they span the whole range of possible contacts.

Measurements disagreed from the start, and the disagreement has a clear shape. Barriers on silicon and gallium arsenide depend on the metal only weakly: the slope of barrier height against work function, measured over many metals, is around 0.1 to 0.3 rather than one, and for gallium arsenide nearly every metal gives a barrier close to 0.8 eV. The barrier looks as though it were fixed by the semiconductor and not by the contact. That is what the solid curves show, for increasing densities of states at the interface.

A few states that screen a metal #

Bardeen’s explanation, published in 1947 while he was working on the problem that led to the transistor, was that the interface has electronic states of its own, with energies inside the semiconductor’s band gap. A crystal’s bulk bands are the collective states of an infinite repeat. Cutting the crystal breaks the repeat, and a surface can host states that decay into the bulk on both sides of it, exactly as the end that knows how the middle was cut found at the end of a chain whose links alternate. At a real surface they are dangling bonds, defects, and the tails of the metal’s own electronic states reaching into the gap.

Those states fill with electrons up to the Fermi level, like any other level in contact with a reservoir — the filling the site that fills like an electron level describes, repeated at every site. They have a neutrality level, $\phi_0$ above the valence band: when the Fermi level sits there, they are electrically neutral; above it they carry negative charge, below it positive. Any difference between where the metal would put the Fermi level and where the interface states want it is taken up by charge in the interface states, which sit a fraction of a nanometre from the metal. That charge and its image in the metal form a thin dipole layer, and the potential drop across the dipole absorbs most of the metal’s work-function difference before it reaches the semiconductor.

Bardeen’s model puts it in one formula. With $D_{it}$ interface states per unit area per unit energy, a gap $\delta$ between the metal and the semiconductor’s surface and a gap permittivity $\varepsilon_i$,

$$\phi_B = S(\phi_m - \chi) + (1-S)(E_g - \phi_0), \qquad S = \frac{1}{1 + q^2\delta D_{it}/\varepsilon_i}.$$

The barrier is a weighted average of Schottky and Mott’s value and the value the interface states prefer, and the weight $S$ falls as the density of states rises. The figure uses a gap of half a nanometre, the permittivity of vacuum across it, and a neutrality level a third of the way up silicon’s 1.12 eV gap, which pins the barrier near 0.76 eV. With $10^{12}$ states per cm² per eV the slope is 0.92 and the metal still matters. With $10^{13}$ it is 0.53. With $10^{14}$ it is 0.10: aluminium and platinum give barriers of 0.71 and 0.84 eV, only 0.13 eV apart for work functions nearly an electronvolt and a half apart.

Why so few states are enough #

The striking thing is how small a density does the pinning.

The figure plots the slope against the density of interface states over six decades. It stays near one below $10^{12}$ states per cm² per eV, halves at $1.1\times10^{13}$, and is 0.10 at $10^{14}$. The shaded band is the range of measured slopes for silicon and gallium arsenide, and it sits where the pinning is strong.

For scale, a silicon surface has about $7\times10^{14}$ atoms per square centimetre, each of which has a bond cut when the crystal is cleaved or etched. A disordered interface in which one surface atom in ten, or in a hundred, leaves a state somewhere in the gap supplies $10^{13}$ to $10^{14}$ states per cm² spread over about an electronvolt, which is the density needed. The mechanism is powerful because the charge sits so close to the metal. A sheet of charge across a gap of half a nanometre is a capacitor with an enormous capacitance per unit area, so a small charge produces a large potential drop, and a small density of states per unit energy produces enough charge to absorb almost any work-function difference.

The same arithmetic explains the other half of the pattern that was measured. Kurtin, McGill and Mead in 1969 compared many semiconductors and found that the slope depends on how ionic the semiconductor is. Covalent ones such as silicon, germanium and gallium arsenide pin strongly, with slopes of 0.1 to 0.3, while ionic ones such as zinc sulphide and the oxides follow Schottky and Mott’s rule more closely, with slopes approaching one. Covalent crystals have directional bonds whose cutting leaves states in the gap; ionic crystals with wide gaps have fewer states there to do the pinning.

A barrier made of bent bands #

Whatever sets its height, the barrier is carried by the semiconductor’s bands bending near the interface, and its shape is set by the doping.

The figure draws the bands of n-type silicon doped with $10^{16}$ donors per cubic centimetre next to a metal, for a barrier of 0.75 eV. Far from the metal the doping sets the conduction band 0.21 eV above the Fermi level. At the interface the barrier fixes it 0.75 eV above. In between, over a depletion region 267 nanometres wide, the silicon has lost its free electrons to the metal and the interface states, and the fixed positive charge of the ionised donors left behind bends the bands into a parabola by Poisson’s equation.

That shape is the same as on one side of a p–n junction, and it rectifies for the same reason. An electron approaching from the silicon must climb the 0.55 volts of band bending, which a forward voltage lowers and a reverse voltage raises. An electron approaching from the metal must climb the full barrier height, which neither voltage changes. So the current from silicon to metal grows exponentially with forward voltage while the current the other way stays fixed and small. The flow over the barrier is thermionic emission: the fraction of electrons with enough energy to cross is the exponential that decides everything, $e^{-\phi_B/kT}$, times a rate at which they arrive.

A diode that turns on early #

The difference from a p–n junction is in what carries the current, and it shows in the numbers.

The figure plots forward current against voltage for two metal contacts on silicon, with barriers of 0.6 and 0.8 eV, and for an ordinary silicon p–n junction. All three rise by a factor of ten for every 60 millivolts at room temperature, because all three are governed by a Boltzmann factor. They differ in their saturation currents, which are the currents at which the exponentials start. A metal contact’s saturation current is set by electrons crossing the barrier from the metal, and even a 0.8 eV barrier lets far more through than a p–n junction’s saturation current, which is set by minority carriers generated thermally across the whole 1.12 eV gap. So at a current of one ampere per square centimetre the 0.6 eV contact needs only 0.18 volts, the 0.8 eV contact 0.38, and the p–n junction 0.71.

A lower forward voltage means less power lost in the diode, which is why metal–semiconductor diodes are used in power supplies. The second advantage matters more. The current in a metal contact is carried entirely by majority electrons, which cross the barrier and are immediately part of the metal’s sea. A p–n junction’s current puts minority carriers into each side, and when the diode is switched off those stored carriers must be removed before the current stops, which takes nanoseconds to microseconds. A metal contact has nothing stored and switches off in picoseconds. Schottky diodes are the fast diodes in radio detectors and high-frequency mixers for exactly this reason.

Pinning dictates the design choices here too. Because the barrier depends so weakly on the metal, a designer cannot pick a barrier by picking a metal. Silicides, compounds of silicon with metals such as platinum, nickel or titanium, form cleaner interfaces with fewer states, and each gives a reproducible barrier. The choice of silicide is effectively a choice among a handful of barriers the pinning allows.

The contact that is made by doping #

Pinning creates a difficulty that every silicon chip has to solve billions of times. A transistor needs contacts that pass current in both directions with negligible resistance — ohmic contacts — and the Schottky–Mott rule would make that easy: pick a metal with a work function below the semiconductor’s electron affinity and there would be no barrier. Pinning forbids it. Every metal makes a barrier of most of an electronvolt.

The solution is to leave the barrier alone and make it thin. The width of the depletion region falls as the inverse square root of the doping, because more donors per unit volume supply the required charge within a shorter distance. The figure plots it behind a 0.8 eV barrier. At $10^{16}$ donors per cubic centimetre it is 301 nanometres, far too wide to cross except by climbing over. At $10^{18}$ it is 30 nanometres, and at $10^{20}$ it is 3.0 nanometres, a few atomic layers. Electrons tunnel through a barrier that thin, as the wall that is not quite a wall found for any barrier comparable with the decay length of the wavefunction inside it. The crossover is set by a characteristic tunnelling energy that grows as the square root of the doping and passes the thermal energy $kT$ near $6\times10^{18}$ per cubic centimetre. Above that, tunnelling dominates, and the contact’s resistance falls exponentially as the doping rises further.

So every ohmic contact in a silicon integrated circuit is a Schottky barrier made irrelevant: the silicon under the metal is doped to $10^{20}$ or more, so that the barrier is still there and electrons pass straight through it. As transistors shrink, the contact area shrinks with them, and the resistance of these tunnelling contacts has become one of the limits on how fast a transistor can be made. That has revived interest in unpinning the barrier by other means — inserting an insulating layer a nanometre thick between the metal and the silicon, which pushes the metal’s states back from the semiconductor and passivates its dangling bonds, at the cost of adding a tunnelling barrier of its own.

A work function is a surface’s property too #

The pinning argument has a counterpart on the metal’s side that makes it less surprising. A work function looks like a property of a metal, a number in a table. It is really a property of a metal’s surface. The electrons at a metal’s surface spill slightly out beyond the last layer of ions, leaving the ions’ charge slightly exposed on the inside, and that separation is a dipole layer a fraction of an ångström thick. The potential step across it is part of the work function. Different crystal faces of the same metal have different spill-outs and different work functions: tungsten’s range from about 4.5 to 5.3 eV depending on the face. A monolayer of caesium on tungsten lowers its work function by more than two electronvolts, which is how thermionic cathodes are made to emit at modest temperatures.

So the quantity the Schottky–Mott rule treats as the metal’s own is already set by a thin surface dipole, and the rule’s failure is the observation that at a contact a second dipole forms that overrides the first. The measurement that sees these dipoles most directly is the tunnelling current between a sharp tip and a surface, which the last atom does all the seeing found falling by nearly a decade per ångström at a rate set by the work function. Scanning a tip across a surface and recording that rate maps the local work function atom by atom, and the maps show it varying across steps, defects and adsorbed atoms by tenths of an electronvolt.

The same logic also runs through the semiconductor’s side. The Fermi level is the electrochemical potential of the electrons, the quantity the voltage that is a chemical potential turned into a voltmeter reading, and doping moves it by moving the balance between electrons and holes, as the product doping cannot move showed. At a pinned contact, doping still sets the Fermi level deep in the silicon, and the bands bend to connect it to the pinned value at the surface. Doping decides how the barrier is shaped and how thick it is; the interface decides how high it is. That division is exactly what the last figure exploits.

What Bardeen’s picture leaves out #

Bardeen’s model is a two-parameter description, and the parameters themselves need explaining.

Where the states come from. Bardeen attributed them to the surface of the semiconductor. Heine pointed out in 1965 that a metal in contact with a semiconductor also induces states: the metal’s electron wavefunctions at energies in the semiconductor’s gap cannot propagate into it, but they decay into it over a few ångströms, and those decaying tails are gap states in their own right. These metal-induced gap states exist even at an ideal, defect-free interface, and theories based on them predict the neutrality level from the semiconductor’s band structure alone. Measured barriers agree with those predictions for many semiconductors to within a tenth of an electronvolt, which suggests that much of the pinning is intrinsic rather than due to defects.

The interface is not uniform. Real contacts have patches of different barrier height, set by grain boundaries, reacted phases and local chemistry. The current flows preferentially through the low-barrier patches, so measured current–voltage curves give lower apparent barriers than capacitance measurements, which average over the whole area. Reported barrier heights for the same metal on the same semiconductor scatter by a tenth of an electronvolt or more with preparation, which is why the figures use a model rather than a table of measurements.

The barrier is lowered by the field. An electron near a metal surface is attracted by its own image charge, which rounds off and lowers the top of the barrier, more so at high fields. The effect, image-force lowering, is a few hundredths of an electronvolt and grows with reverse voltage, which is why reverse currents in Schottky diodes do not saturate cleanly.

Still open: whether the barrier is set by defects or by bonds #

The division of pinning between metal-induced gap states, defects created when the metal is deposited, and the chemistry of the specific bonds formed at the interface has been argued since the 1970s and is still not fully settled. Epitaxial interfaces, where the metal or silicide grows as a single crystal matched to the semiconductor, show that different interface structures of the same two materials give barriers differing by up to 0.1–0.3 eV. That shows the interface’s atomic arrangement matters — a result that neither a purely defect-based nor a purely intrinsic theory predicts. First-principles calculations of specific interfaces reproduce these differences, and they attribute them to the dipole formed by the bonds at the interface. Whether a general rule relating the barrier to the semiconductor alone, as the pinning picture suggests, can coexist with this sensitivity to the interface’s structure is an active question in contact engineering for new materials, including two-dimensional semiconductors, where the interface can be atomically clean and the pinning is often unexpectedly strong.

The habit worth carrying away is to look for a thin layer that controls a large quantity. A small density of states sitting a fraction of a nanometre from a metal forms a dipole whose capacitance is so large that it absorbs almost any potential difference placed across it, and the barrier is then set by where those states are neutral, not by the materials on either side. Choosing a metal was supposed to choose the barrier; instead a layer one atom thick chooses it, and the engineering of contacts became the art of making barriers thin rather than making them low.